Armada 3700


The Marvell® ARMADA® 3700 family of devices delivers comprehensive System-on-Chip (SoC) solutions powered by the dual Cortex-A53 ARMv8 high-performance CPU technology. The devices incorporate rich and diversified high-speed I/Os, such as USB 3.0, SATA 3.0, PCI-Express 2.0, and 2.5 GbE (NBASE-T). In addition, they incorporate a wide set of security and data acceleration engines suitable for innovative networking, storage, and compute applications. The innovative and unique architecture of the ARMADA 3700 family performs up to 7,000 CoreMarks under 1Watt, delivering unprecedented performance-to-power and performance-to-cost index in the embedded market.

Key features of the Marvell® ARMADA® 3700 family of devices:

  • 2 x Gigabit Ethernet 1Gbps / 2.5Gbps
  • Compatible with Marvell NBASE-T Transceivers
  • USB 3.0 Host/Device compatible with xHCI v1.0
  • USB 2.0 Host
  • PCI Express (PCIe) 2.0 (RC or EP)
  • SATA 3.0
  • DMA, 2 x high-bandwidth DMA/XOR/CRC engines
  • Flash and Peripheral I/Os, including 2 x SDIO 3/0. SPI, UART, GPIOs
  • Integrated power switches for dynamic shut-down of
  • Dual core ARMv8 Cortex-A53 CPU
  • CPU core operating speed of up to 1.2 GHz
  • FIPS-140 certified
  • 32 KB-Instruction / Data (4-way) set associative L1 cache with Parity/ECC protection
  • High-bandwidth, low-latency IO Cache Coherency
  • High-speed 8/16-bit DDR3/3L/DDR4 DRAM memory controller
  • Enhanced, low-latency memory controller with transaction re-ordering, write gathering, and data prefetch engine
  • High-performance security offload engine including IPSec, SSL, DTLS, and IKE
  • Hardware compliance with ARM Trustzone®architecture for DRM
  • Enhanced Secure-Boot flow using integrated One Time Programmable (OTP) memory
  • Visualization (KVM demo)

Documentation can be found below:

 Armada 3700 Block diagram:
ArmadaLP BD Dual Core Rev03 Block Diagram

  • Note: Ensure the eMMC5.1 device is compatible to the JESD84-C44 mechanical standard (MO-276).